Simon McIntosh-Smith is a full Professor of High Performance Computing at the University of Bristol in the UK. He began his career in industry as a microprocessor architect, first at Inmos and STMicroelectronics in the early 1990s, before co-designing the world's first fully programmable GPU at Pixelfusion in 1999. In 2002 he co-founded ClearSpeed Technology where, as Director of Architecture and Applications, he co-developed the first modern many-core HPC accelerators.

He now leads the High Performance Computing Research Group at the University of Bristol, where his research focuses on advanced computer architectures and performance portability. He plays a key role in designing and procuring supercomputers at the local, regional and national level, including the UK’s national HPC service, Archer. In 2016 he led the successful bid by the GW4 Alliance along with the UK’s Met Office and Cray, to design and build ‘Isambard’, the world’s first production, ARMv8-based supercomputer.

Research interests

A major new trend starting to emerge in computer architecture is the move towards heterogeneous computing. Described as a new “golden age in computer architecture” by Hennessy and Patterson in their ACM/IEEE Turing award lecture at ISCA 2018 [1], the driving forces behind this shift come from a simultaneous slowdown in the rate of innovation in both CPU architectures and semiconductor design processes. Indeed, Dennard Scaling (the ability to exploit lower voltages to keep chip-level power consumption in check) is regarded as having halted several years ago [2], while the industry-wide ITRS roadmap for semiconductors now predicts a slowdown in “Moore’s Law”, taking three years rather than the historical two to yield a doubling in transistor density per chip [3]. Innovation in computer architecture is regarded as the only way to meet this challenge.

Professor McIntosh-Smith's Turing-related research aims to create new heterogeneous computer architecture designs which deliver significant steps forward in performance for key applications within the Turing's remit. These new architectures, which can be co-designed alongside the relevant algorithms, will be simulated using a new rapid processor simulator development framework currently being designed within McIntosh-Smith’s research group in Bristol [4]. This framework enables the development of cycle-accurate CPU simulators able to run real codes generated by real compilers. This simulator framework already supports the Arm instruction set, including the new Scalable Vector Extensions (SVE). Support for additional instruction sets, such as x86 and RISC-V, will be added in the future. The simulator enables the rapid development of hypothetical computer architectures, and exploration of design spaces such as heterogeneous co-processors, memory hierarchies, mixed precision arithmetic, massive multi-threading, and memory centric system designs.

During this Turing-related project, Professor McIntosh-Smith's group will use the simulator to investigate new computer architectures optimised specifically for applications in the data science and AI at scale theme, with the goal of significantly outperforming today’s CPU and GPU architectures. Any number of “data science at scale” algorithms could motivate the investigation, but one area already being actively explored by the McIntosh-Smith is ultra large-scale weather and climate simulations involving hundreds of PetaBytes of data or more; the Met Office and ECMWF are partners in this work. The project will also explore the notion of “self-designing architectures”, where machine learning techniques can be applied to automatically design superior next-generation computer architectures; some early explorations in this area have shown promising results.

[2] Mark Bohr. A 30 year retrospective on Dennard’s MOSFET scaling paper. Solid-State Circuits Newsletter, IEEE, 12(1):11 –13, winter 2007.